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OpenVM Instruction Mapping

In this document, we provide a mapping between the representation of instructions in the OpenVM codebase and the instructions in the ISA specification.

  • Instructions in OpenVM implement the LocalOpcode trait. Different groups of LocalOpcodes from different VM extensions may be combined to form a set of instructions for a customized VM using several extensions.
  • The PHANTOM instruction may be extended in each VM extension by adding new sub-instructions with different PhantomDiscriminant values.

In the tables below, we provide the mapping between the LocalOpcode and PhantomDiscriminant and instructions and phantom sub-instructions in the ISA specification.

System Instructions

Instructions

VM ExtensionLocalOpcodeISA Instruction
SystemSystemOpcode::TERMINATETERMINATE
SystemSystemOpcode::PHANTOMPHANTOM

Phantom Sub-Instructions

VM ExtensionPhantomDiscriminantISA Phantom Sub-Instruction
SystemSysPhantom::NopNop
SystemSysPhantom::DebugPanicDebugPanic
SystemSysPhantom::CtStartCtStart
SystemSysPhantom::CtEndCtEnd

RV32IM Extension

Instructions

VM ExtensionLocalOpcodeISA Instruction
RV32IMBaseAluOpcode::ADDADD_RV32
RV32IMBaseAluOpcode::SUBSUB_RV32
RV32IMBaseAluOpcode::XORXOR_RV32
RV32IMBaseAluOpcode::OROR_RV32
RV32IMBaseAluOpcode::ANDAND_RV32
RV32IMShiftOpcode::SLLSLL_RV32
RV32IMShiftOpcode::SRLSRL_RV32
RV32IMShiftOpcode::SRASRA_RV32
RV32IMLessThanOpcode::SLTSLT_RV32
RV32IMLessThanOpcode::SLTUSLTU_RV32
RV32IMRv32LoadStoreOpcode::LOADBLOADB_RV32
RV32IMRv32LoadStoreOpcode::LOADHLOADH_RV32
RV32IMRv32LoadStoreOpcode::LOADWLOADW_RV32
RV32IMRv32LoadStoreOpcode::LOADBULOADBU_RV32
RV32IMRv32LoadStoreOpcode::LOADHULOADHU_RV32
RV32IMRv32LoadStoreOpcode::STOREBSTOREB_RV32
RV32IMRv32LoadStoreOpcode::STOREHSTOREH_RV32
RV32IMRv32LoadStoreOpcode::STOREWSTOREW_RV32
RV32IMBranchEqualOpcode::BEQBEQ_RV32
RV32IMBranchEqualOpcode::BNEBNE_RV32
RV32IMBranchLessThanOpcode::BLTBLT_RV32
RV32IMBranchLessThanOpcode::BGEBGE_RV32
RV32IMBranchLessThanOpcode::BLTUBLTU_RV32
RV32IMBranchLessThanOpcode::BGEUBGEU_RV32
RV32IMRv32JalLuiOpcode::JALJAL_RV32
RV32IMRv32JalrOpcode::JALRJALR_RV32
RV32IMRv32JalLuiOpcode::LUILUI_RV32
RV32IMRv32AuipcOpcode::AUIPCAUIPC_RV32
RV32IMMulOpcode::MULMUL_RV32
RV32IMMulHOpcode::MULHMULH_RV32
RV32IMMulHOpcode::MULHSUMULHSU_RV32
RV32IMMulHOpcode::MULHUMULHU_RV32
RV32IMDivRemOpcode::DIVDIV_RV32
RV32IMDivRemOpcode::DIVUDIVU_RV32
RV32IMDivRemOpcode::REMREM_RV32
RV32IMDivRemOpcode::REMUREMU_RV32
RV32IMRv32HintStoreOpcode::HINT_STOREWHINT_STOREW_RV32
RV32IMRv32HintStoreOpcode::HINT_BUFFERHINT_BUFFER_RV32
RV32IMPseudo-instruction for STOREW_RV32REVEAL_RV32

Phantom Sub-Instructions

VM ExtensionPhantomDiscriminantISA Phantom Sub-Instruction
RV32IMRv32Phantom::HintInputRv32HintInput
RV32IMRv32Phantom::PrintStrRv32PrintStr
RV32IMRv32Phantom::HintRandomRv32HintRandom

Deferral Extension

Instructions

VM ExtensionLocalOpcodeISA Instruction
DeferralDeferralOpcode::CALLCALL_RV32
DeferralDeferralOpcode::OUTPUTOUTPUT_RV32

Keccak Extension

Instructions

VM ExtensionLocalOpcodeISA Instruction
KeccakXorinOpcode::XORINXORIN_RV32
KeccakKeccakfOpcode::KECCAKFKECCAKF_RV32

SHA-2 Extension

Instructions

VM ExtensionLocalOpcodeISA Instruction
SHA-2Rv32Sha2Opcode::SHA256SHA256_UPDATE_RV32
SHA-2Rv32Sha2Opcode::SHA512SHA512_UPDATE_RV32

BigInt Extension

Instructions

VM ExtensionLocalOpcodeISA Instruction
BigIntRv32BaseAlu256Opcode(BaseAluOpcode::ADD)ADD256_RV32
BigIntRv32BaseAlu256Opcode(BaseAluOpcode::SUB)SUB256_RV32
BigIntRv32BaseAlu256Opcode(BaseAluOpcode::XOR)XOR256_RV32
BigIntRv32BaseAlu256Opcode(BaseAluOpcode::OR)OR256_RV32
BigIntRv32BaseAlu256Opcode(BaseAluOpcode::AND)AND256_RV32
BigIntRv32Shift256Opcode(ShiftOpcode::SLL)SLL256_RV32
BigIntRv32Shift256Opcode(ShiftOpcode::SRL)SRL256_RV32
BigIntRv32Shift256Opcode(ShiftOpcode::SRA)SRA256_RV32
BigIntRv32LessThan256Opcode(LessThanOpcode::SLT)SLT256_RV32
BigIntRv32LessThan256Opcode(LessThanOpcode::SLTU)SLTU256_RV32
BigIntRv32BranchEqual256Opcode(BranchEqualOpcode::BEQ)BEQ256_RV32
BigIntRv32BranchEqual256Opcode(BranchEqualOpcode::BNE)BNE256_RV32
BigIntRv32BranchLessThan256Opcode(BranchLessThanOpcode::BLT)BLT256_RV32
BigIntRv32BranchLessThan256Opcode(BranchLessThanOpcode::BGE)BGE256_RV32
BigIntRv32BranchLessThan256Opcode(BranchLessThanOpcode::BLTU)BLTU256_RV32
BigIntRv32BranchLessThan256Opcode(BranchLessThanOpcode::BGEU)BGEU256_RV32
BigIntRv32Mul256Opcode(MulOpcode::MUL)MUL256_RV32

Algebra Extension

Instructions

VM ExtensionLocalOpcodeISA Instruction
AlgebraRv32ModularArithmeticOpcode::ADDADDMOD_RV32<N>
AlgebraRv32ModularArithmeticOpcode::SUBSUBMOD_RV32<N>
AlgebraRv32ModularArithmeticOpcode::SETUP_ADDSUBSETUP_ADDSUBMOD_RV32<N>
AlgebraRv32ModularArithmeticOpcode::MULMULMOD_RV32<N>
AlgebraRv32ModularArithmeticOpcode::DIVDIVMOD_RV32<N>
AlgebraRv32ModularArithmeticOpcode::SETUP_MULDIVSETUP_MULDIVMOD_RV32<N>
AlgebraRv32ModularArithmeticOpcode::IS_EQISEQMOD_RV32<N>
AlgebraRv32ModularArithmeticOpcode::SETUP_ISEQSETUP_ISEQMOD_RV32<N>
AlgebraFp2Opcode::ADDADD_RV32<Fp2>
AlgebraFp2Opcode::SUBSUB_RV32<Fp2>
AlgebraFp2Opcode::SETUP_ADDSUBSETUP_ADDSUB_RV32<Fp2>
AlgebraFp2Opcode::MULMUL_RV32<Fp2>
AlgebraFp2Opcode::DIVDIV_RV32<Fp2>
AlgebraFp2Opcode::SETUP_MULDIVSETUP_MULDIV_RV32<Fp2>

Phantom Sub-Instructions

VM ExtensionPhantomDiscriminantISA Phantom Sub-Instruction
AlgebraModularPhantom::HintNonQrHintNonQr<N>
AlgebraModularPhantom::HintSqrtHintSqrt<N>

Elliptic Curve Extension

Instructions

VM ExtensionLocalOpcodeISA Instruction
Elliptic CurveRv32WeierstrassOpcode::EC_ADD_NEEC_ADD_NE_RV32<C>
Elliptic CurveRv32WeierstrassOpcode::SETUP_EC_ADD_NESETUP_EC_ADD_NE_RV32<C>
Elliptic CurveRv32WeierstrassOpcode::EC_DOUBLEEC_DOUBLE_RV32<C>
Elliptic CurveRv32WeierstrassOpcode::SETUP_EC_DOUBLESETUP_EC_DOUBLE_RV32<C>

Pairing Extension

Phantom Sub-Instructions

VM ExtensionPhantomDiscriminantISA Phantom Sub-Instruction
PairingPairingPhantom::HintFinalExpHintFinalExp